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Linux in a Pixel Shader – A RISC-V Emulator for VRChat

(blog.pimaker.at) by rbanffy | view | 17 comments

Qualcomm acquires RISC-V focused Ventana Micro Systems

(qualcomm.com) by fork-bomber | view | 78 comments

Mojo-V: Secret Computation for RISC-V

(github.com) by fork-bomber | view | 28 comments

Upbeat Technology's RISC-V MCU Takes Flight with Near-Threshold Computing

(allaboutcircuits.com) by warrenm | view | 8 comments

Speedrunning a CPU: RISC-V in a Week

(daymare.net) by daymare | view | 0 comments

Dare (Digital Autonomy with RISC-V in Europe)

(dare-riscv.eu) by doener | view | 0 comments

All Intel GPUs Run on Raspberry Pi and RISC-V

(jeffgeerling.com) by mikece | view | 0 comments

Porting Lean to the ESP32-C3 RISC-V Microcontroller

(kuruczgy.com) by panic | view | 0 comments

RISC-V Oral History Panel [video]

(youtube.com) by camel-cdr | view | 0 comments

Ainekko Buys Esperanto RISC-V Edge Inference Hardware IP, Open-Sources It

(eetimes.com) by transpute | view | 0 comments

QRV Operating System: QNX on RISC-V

(r-tty.blogspot.com) by chrsw | view | 0 comments

Igniting the GPU: From Kernel Plumbing to 3D Rendering on RISC-V

(mwilczynski.dev) by michalwilczynsk | view | 0 comments

Proving Safety at Scale: Spark, RISC-V, and Nvidia's Security Strategy

(blog.adacore.com) by ajdude | view | 0 comments

The next RISC-V processor frontier: AI

(edn.com) by fzliu | view | 0 comments

Canonical Gets Flutter Up and Running on RISC-V for Ubuntu

(phoronix.com) by mikece | view | 0 comments

Canonical Evolution of Enterprise Open Source RISC-V at Hot Chips 2026

(servethehome.com) by rbanffy | view | 0 comments

RISC-V Emulator and Linux System from Scratch

(github.com) by Bluestein | view | 0 comments

RISC-V is now officially supported by CPython

(blog.python.org) by lumpa | view | 0 comments

A 3rd World Embedded Engineer Responds to "RISC-V They Should Have Known Better"

(rvembedded.com) by Narishma | view | 0 comments

Why has the most influential RISC-V startup just cut 130 people?

(youtube.com) by OhMeadhbh | view | 1 comments

Prompt to tape out: Autonomous AI agent builds 1.5 GHz RISC-V CPU

(blog.adafruit.com) by monocasa | view | 0 comments

RISC-V User-Space Control Flow Integrity / Shadow Stack Appears Ready

(phoronix.com) by maxloh | view | 0 comments

Chinese RISC-V Chipmaker SpacemiT Launches K3 AI CPU

(barchart.com) by _____k | view | 0 comments

A glimpse into V8 development for RISC-V

(riseproject.dev) by floitsch | view | 0 comments

The second generation of DC-ROMA RISC-V Mainboard for Framework Laptop 13

(store.deepcomputing.io) by DeepComputing | view | 1 comments

Training a GPT from scratch in C on a RISC-V MCU with no FPU, in 37KB of code

(rvembedded.com) by armstrongsubero | view | 0 comments

YuzukiNeko – A Linux-Capable Allwinner F101 RISC-V SBC

(cnx-software.com) by fork-bomber | view | 0 comments

Where Will RISC-V Be in 20 Years? Poll Results

(thechipletter.substack.com) by rbanffy | view | 0 comments

Update on RISC-V Standards and Adoption at Hot Chips 2026 – ServeTheHome

(servethehome.com) by rbanffy | view | 0 comments

Update on RISC-V Standards and Adoption at Hot Chips 2026

(servethehome.com) by lumpa | view | 0 comments

Where will RISC-V be in 20 years? Poll results

(thechipletter.substack.com) by klelatti | view | 0 comments

SERV – The SErial RISC-V CPU Topics

(github.com) by Bluestein | view | 0 comments

RISC-V Interpreter from the Future

(abundance.build) by arto | view | 0 comments

ArXiv: CTTE: An Open Dual-Protocol RISC-V Trace Encoder for N-Trace and E-Trace

(arxiv.org) by xlbxrt | view | 0 comments

SiFive Accelerates RISC-V Datacenter Adoption with the BigSky Development Server

(businesswire.com) by fork-bomber | view | 0 comments

Hot Chips 2026: CUDA Targets RISC-V – By Chester Lam

(chipsandcheese.com) by rbanffy | view | 0 comments

ISO/IEC DIS 26791-1 – The RISC-V instruction set manual

(iso.org) by camel-cdr | view | 0 comments

Xcena MX1 RISC-V Computational Memory in CXL 3.0 – ServeTheHome

(servethehome.com) by rbanffy | view | 0 comments

Espressif Releases Linux BSP for ESP32-S31 RISC-V Boards

(cnx-software.com) by jandeboevrie | view | 0 comments

ESP32-S31 dual-core RISC-V SoC is getting official Linux support

(cnx-software.com) by pyprism | view | 0 comments

NetBSD 11 lands with RISC-V support and fast VM boots

(theregister.com) by sohkamyung | view | 0 comments

Humble Bundle: Embedded Firmware Books on ARM, RTOS, RISC-V and Linux

(humblebundle.com) by NehaPande | view | 0 comments

RISC-V Extension Landscape

(rpsene.github.io) by mshockwave | view | 0 comments

Spectre on RISC-V Silicon [pdf]

(lukasgerlach.me) by Tomte | view | 0 comments

A Third World Embedded Engineer Responds to RISC-V They Should Have Known Better